1. Technical Field
The present invention relates to a semiconductor device and its manufacturing method.
2. Related Art
As high integration and miniaturization of semiconductor devices have progressed in recent years, the demand for higher accuracy has grown in the alignment when a contact layer that connects wiring to a semiconductor layer is formed. Therefore, JA-8-181204, which is an example of related art, discloses a technique that forms an etching stopper film between an interlayer insulating layer and a semiconductor layer to prevent the damage to an element or a semiconductor layer even if excessive etching is performed when a contact hole is formed.
One of methods to evaluate reliability of a semiconductor device is an evaluation method that performs a bias-temperature (BT) test while exposing a device to light. This evaluation method first measures power consumption before exposing the device to light, and then measures power consumption after exposing the device to light for a certain time. It compares the obtained values of power consumption to check whether a leakage occurs or not, that is, whether a change in the characteristics of the device due to its exposure to light is present or not.
There is an idea that the presence of the etching stopper film mentioned above is related to such a characteristics change of the device due to its exposure to light, and therefore improvement is desired. In particular, a device constituting a display driver of a liquid crystal display is always exposed to light from the backlight, and therefore it is very important that the characteristics of the device do not change even though the device is exposed to light.